>> DDR SDRAM

Microsemi’s family of DDR SDRAM based Multi-Chip Packages (MCPs) is designed to give our customers a high density memory solution that also meets the wide data widths necessary for their applications. These high speed memories use a 2ns-prefetch architecture with an interface that allows two data words to be transmitted per clock cycle.

Starting at a density of 128MB (1Gb) in x16, x64 and x72 data width configurations these DDR memories provide many benefits, such as: space savings versus single die packages including CSPs, reduced I/O routing, reduced component count and placements, and extended temperature range testing including industrial and military.